India eyes domestic smart-meter chips by mid-2028, Power Secretary says

NEW DELHI: Power Secretary Pankaj Agarwal said India wants design-in-India chips inside smart electricity meters by mid-2028, with fabricated-in-India chips on a matching horizon. He spoke at the 2nd Indian Power Sector Conference organised by FICCI and expanded on the plan to reporters on the sidelines around 24-25 September 2026.

The driver, he said, is cybersecurity as much as localisation. Smart meters sit on the distribution edge of the grid; imported controller silicon is a concentration risk when millions of endpoints come online under national and state schemes.

Design now, fabricate next

Agarwal said chip developers and meter makers are already engaged. Some designs are under way or in testing; once validated, commercial production can follow without a long void. He put today's smart-meter chip cost in the $8-$10 range per unit and argued that government procurement itself is the demand signal - no separate incentive scheme is required for domestically designed chips if utilities keep buying.

He also said Make in India requirements covering design-in-India and fabricated-in-India chips for smart meters have already been issued with the same mid-2028 style timeline. The precise legal instrument and phased SKU list still need to be read from the ministry's formal orders; his remarks set the policy direction and date band.

Scale already on the wall

Under the Revamped Distribution Sector Scheme, smart metering works covering about 19.79 crore consumers, 52.53 lakh distribution transformers and 2.05 lakh feeders - about 20.33 crore smart meters in sanctioned proposals - have been cleared on state and discom filings. About 5.73 crore smart meters have been installed under RDSS so far, with overall installations across schemes around 7.24 crore, according to the figures cited with his briefing.

Agarwal separately said a note on the draft National Electricity Policy has gone to the Union Cabinet for inter-ministerial consultation after stakeholder comments. The new policy is meant to replace the 2005 document and to handle grid stress from large flexible loads such as AI data centres and green hydrogen.

For meter vendors and chip startups, mid-2028 is both a deadline and a market. Whoever clears validation first will face an assured public buyer; whoever misses the window risks exclusion from the next wave of RDSS and state tenders. Agarwal's public clock is now on the record.

Cybersecurity pressure on the power system has been rising in public briefings through 2026, with grid operators asked to treat meters as networked computers rather than dumb dials. A domestic chip mandate is one procurement lever; CEA rules and utility SOC practices are others.

Cost is the second lever Agarwal named. If design and, later, fabrication move onshore, meter makers may shed some dollar exposure on the controller bill of materials. That only works if yields and validation keep pace with tender schedules.

Discoms watching RDSS milestones now have a policy clock that outlasts any single tender cycle. Mid-2028 is close enough that chip tape-outs starting in 2026-27 are not early - they are barely on time.

Dalimss News will track follow-on pricing, service coverage and software behaviour as these products move from launch notes into daily use.